The increasing demand for integrated circuit devices has sparked a corresponding increase in demand for semiconductor wafers from which integrated circuit chips are made. The need for higher density integrated circuits, as well as the need for higher production throughput of integrated circuits on a per-wafer basis, has resulted in a need for increasing the flatness of the semiconductor wafer surface, both during initial production of the semiconductor wafer as well as during the actual building of the integrated circuit on the wafer surface.
The need for increased planarity of semiconductor wafer surfaces presents heretofore unencountered challenges for the chemical mechanical polishing (CMP) industry.
Presently known CMP machines typically employ either a single carrier or a plurality of carriers, each configured to hold a single semiconductor wafer firmly against a polishing surface, for example the upper surface of a rotating polishing pad. As a result of the relative motion between the semiconductor wafer surface to be polished and the polishing pad, coupled with the downward pressure applied by the wafer carrier to press the wafer against the polishing pad, even very small deviations in the uniformity of the pressure applied to the semiconductor wafer across the wafer surface can result in imperfections in the planarization process.
More particularly, many presently known wafer carrier assemblies employ a gimbal mechanism to permit the surface of the semiconductor wafer in contact with the polishing pad to remain parallel to the polishing pad, even if the polishing pad exhibits local deviations from planarity. Such gimballing mechanisms can be problematic, however, in that as the wafer "tilts" with respect to the vertical global axis of the carrier, uneven back pressure may be applied to the wafer resulting in compromised planarization. Moreover, many known gimbal mechanisms typically apply pressure to a backing plate which, in turn, applies pressure to the wafer. To the extent the gimbal mechanism applies point loading to the backing plate, relatively thick backing plates need to be employed to distribute the point loading more evenly across the back surface of the wafer. Increasing the thickness of the backing plate to ensure uniform loading, however, often places the gimbal point detrimentally high above the wafer polishing plane, which can sometimes cause the wafer to tilt with respect to the polishing surface, further compromising planarization of the finished workpiece.
For a fuller discussion of many presently known wafer carrier assemblies, see: Shendon et al., European Patent Application No. 96304118.1, filed May 6, 1996; Shendon et al., U.S. Pat. No. 5,205,082, entitled "Wafer Polisher Head Having Floating Retainer Ring", issued Apr. 27, 1993; Bolandi et al., U.S. Pat. No. 5,571,044, entitled "Wafer Holder for Semiconductor Wafer Polishing Machine", issued Nov. 5, 1996; Kobayashi et al., U.S. Pat. No. 5,584,751, entitled "Wafer Polishing Apparatus", issued Dec. 17, 1996; Nishio et al., European Patent Application No. 96105657.9, filed Oct. 4, 1996; Gill, Jr., U.S. Pat. No. 4,811,522, entitled "Counterbalanced Polishing Apparatus", issued Mar. 14, 1989; Stroupe et al., U.S. Pat. No. 5,533,924, entitled "Polishing Apparatus, A Polishing Wafer Carrier Apparatus, A Replaceable Component for a Particular Polishing Apparatus and A Process of Polishing Wafers", issued Jul. 9, 1996; Okumura et al., U.S. Pat. No. 5,398,459, entitled "Method and Apparatus for Polishing a Workpiece", issued Mar. 21, 1995; Chisholm et al., U.S. Pat. No. 5,522,965, entitled "Compact System and Method for Chemical-Mechanical Polishing Utilizing Energy Coupled to the Polishing Pad/Water Interface", issued Jun. 4, 1996; Shendon et al., U.S. Pat. No. 5,624,299, entitled "Chemical Mechanical Polishing Apparatus with Improved Carrier and Method of Use", issued Apr. 29, 1997; and Breivogel et al., U.S. Pat. No. 5,554,064, entitled "Orbital Motion Chemical-Mechanical Polishing Apparatus and Method of Fabrication", issued Sep. 10, 1996.
Presently known wafer carrier assemblies are unsatisfactory in several regards, resulting in compromised planarization of the finished semiconductor wafer or other workpiece. An improved semiconductor wafer carrier assembly is thus needed which overcomes the shortcomings of the prior art.